Intel Readies New "Tolapai" System-on-Chip

Intel will release its new "Tolapai" system-on-chip by the end of 2007 for embedded markets

Intel expects to penetrate the industrial and embedded computing markets with its Tolapai integrated system-on-chip. Tolapai will be a system-on-chip design that integrates the CPU, north bridge and south bridge functionality into a processor. According to documentation leaked earlier this Intel expects to ready Tolapai by the end of 2007 to take on VIA’s C7 CoreFusion and AMD’s Geode platforms.

Tolapai will feature a cut-down Pentium M-derived processor core with 256KB of L2-cache. Intel will offer Tolapai in three clock-speeds – 600 MHz, 1066 MHz and 1200 MHz. Power consumption will vary from 13-22-watts depending on clock speed. Tolapai supports a maximum of 2GB of DDR2-400/533/667/800 memory in dual-channel configurations.